Ex.No Name of the Experiment Hours
1
Verification of truth table of OR, AND, NOT, NOR, NAND,
EX-OR gates. 3
2 Realization of Logic Gates using NAND gates.
3
3 Verification of Demorgan’s theorems.
3
4 Full adder using Logic Gates.
3
5 Full Subtractor using Logic Gates.
3
6 Construction and Verification of Truth Table for Multiplexer.
3
7
Construction and Verification of truth table for Demultiplexer.
3
8
Construction and Verification of truth table one digit digital
comparator.
3
9
Construction and Verification of truth table for SR Latch
using NAND gates.
3
10 Construct and test the performance of Parity Generator.
3
11 Construction and verification of Truth Table for JK and T
Flip-Flops.
3
12 Construct and test the performance of a 4-bit Asynchronous
up counter.
3
13 Construct and test the performance of a Decade Counter.
3
14 Construct and test Shift Register in SIPO using D flip-flops.
3
15 Construct and test Shift Register in PISO using D flip-flops.
3
Revision 15
TOTAL HOURS 60